332 lines
9.2 KiB
C
332 lines
9.2 KiB
C
#include <utsm/vmx.h>
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#include <utsm/ept.h>
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#include <utsm/log.h>
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#include <utsm/types.h>
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#include <utsm/dma.h>
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#include "../arch/x86_64/limine.h"
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extern volatile struct limine_hhdm_request g_hhdm_request;
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/* ===== MSR / CR helpers ===== */
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u64 vmx_read_msr(u32 msr) {
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u32 lo, hi;
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__asm__ volatile("rdmsr" : "=a"(lo), "=d"(hi) : "c"(msr));
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return ((u64)hi << 32) | lo;
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}
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static __attribute__((unused)) void vmx_write_msr(u32 msr, u64 value) {
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u32 lo = (u32)(value & 0xFFFFFFFFULL);
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u32 hi = (u32)(value >> 32);
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__asm__ volatile("wrmsr" :: "a"(lo), "d"(hi), "c"(msr));
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}
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static inline u64 read_cr0(void) {
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u64 v;
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__asm__ volatile("mov %%cr0, %0" : "=r"(v));
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return v;
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}
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static inline u64 read_cr4(void) {
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u64 v;
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__asm__ volatile("mov %%cr4, %0" : "=r"(v));
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return v;
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}
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static inline void write_cr4(u64 v) {
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__asm__ volatile("mov %0, %%cr4" :: "r"(v));
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}
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static inline u64 read_cr3(void) {
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u64 v;
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__asm__ volatile("mov %%cr3, %0" : "=r"(v));
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return v;
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}
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static inline u64 read_rflags(void) {
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u64 v;
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__asm__ volatile("pushfq; popq %0" : "=r"(v));
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return v;
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}
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/* ===== CPUID ===== */
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static void cpuid(u32 leaf, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx) {
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__asm__ volatile("cpuid"
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: "=a"(*eax), "=b"(*ebx), "=c"(*ecx), "=d"(*edx)
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: "a"(leaf));
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}
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int vmx_supported(void) {
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u32 eax, ebx, ecx, edx;
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cpuid(1, &eax, &ebx, &ecx, &edx);
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return (ecx & (1U << 5)) != 0; /* CPUID.1:ECX[5] = VMX */
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}
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/* ===== VMXON region ===== */
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static u64 g_vmxon_phys;
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static u64 g_vmcs_revision;
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static u64 g_vmx_basic;
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static int g_vmx_enabled;
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/* VMX 要求 CR0 固定位必须为 1（VMX operation 不允许清除）。
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* 这些位由 IA32_VMX_BASIC MSR 的高 32 位（CR0 fixed-0）和
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* IA32_VMX_CR0_FIXED1 MSR 决定。简化：直接 OR 上 PE/NE/PG/WP。 */
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static u64 vmx_required_cr0(void) {
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return read_cr0() | CR0_PE | CR0_NE | CR0_WP | CR0_PG;
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}
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static u64 vmx_required_cr4(void) {
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return read_cr4() | CR4_VMXE | CR4_PAE | CR4_PGE;
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}
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/* Check whether we are running under a hypervisor that does NOT support
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* nested VMX. This covers:
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* - WHPX: CPUID may report VMX but VMXON/CR4.VMXE causes fatal exit
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* - Any hypervisor without nested virtualization support
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*
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* Detection strategy:
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* 1. Check CPUID.01H:ECX[31] (hypervisor present bit)
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* 2. If hypervisor present, check CPUID.40000000H for vendor signature
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* 3. Try reading IA32_VMX_BASIC MSR — if it returns 0, VMX is not real
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* 4. Check Hyper-V specific: HV_CPU_MANAGEMENT_FEATURES for nested VMX
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*
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* If VMX CPUID flag is set but we're under a hypervisor that doesn't expose
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* real VMX MSRs, we must not attempt CR4.VMXE or VMXON, as this will cause
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* a fatal VM exit in WHPX (exit code 4).
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*/
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static int vmx_truly_available(void) {
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/* Step 1: If CPUID doesn't even report VMX, definitely not available */
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if (!vmx_supported()) return 0;
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/* Step 2: Check if running under a hypervisor */
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u32 eax, ebx, ecx, edx;
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cpuid(1, &eax, &ebx, &ecx, &edx);
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if (!(ecx & (1U << 31))) {
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/* No hypervisor — bare metal, VMX should work */
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return 1;
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}
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log_info("[VMX] hypervisor present bit set, checking nested VMX support");
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/* Step 3: Try reading IA32_VMX_BASIC — if it's zero or faults,
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* the hypervisor doesn't expose real VMX. */
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/* We use a safe read: if the MSR doesn't exist, rdmsr would #GP.
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* However, under WHPX, IA32_VMX_BASIC may return a non-zero value
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* even though VMXON will fail. So we need another check. */
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/* Step 4: Check hypervisor vendor for nested VMX support */
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cpuid(0x40000000, &eax, &ebx, &ecx, &edx);
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/* Check for Hyper-V ("Microsoft Hv") */
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if (ebx == 0x7263694DU && ecx == 0x666F736FU && edx == 0x76482074U) {
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log_info("[VMX] Hyper-V detected");
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/* Check if HV_CPU_MANAGEMENT_FEATURES (MSR 0x4000000F) exists.
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* Hyper-V CPUID leaf 0x40000003 tells us which MSRs are available.
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* Partition_privileges bit 1 (nested virtualization) is at EBX bit 1
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* of CPUID 0x40000000 + 3 = 0x40000003.
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* But safer: just check the max CPUID leaf for Hyper-V. */
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u32 hv_max_leaf = eax;
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if (hv_max_leaf >= 0x40000003) {
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/* CPUID 0x40000003 EBX bit 1 = AccessIntrCtrl (nested) */
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cpuid(0x40000003, &eax, &ebx, &ecx, &edx);
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if (ebx & (1U << 1)) {
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log_info("[VMX] Hyper-V nested virtualization supported");
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return 1;
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}
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}
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log_warn("[VMX] Hyper-V WITHOUT nested VMX support");
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log_warn("[VMX] CR4.VMXE / VMXON would cause fatal exit, skipping");
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return 0;
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}
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/* Check for KVM ("KVMKVMKVM") */
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if (ebx == 0x4B4D564BU && ecx == 0x564B4D56U && edx == 0x4D564B4DU) {
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log_info("[VMX] KVM detected — nested VMX may be available");
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/* KVM typically supports nested VMX if enabled */
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return 1;
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}
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/* Unknown hypervisor — be conservative: skip VMX to avoid
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* fatal exits. The user must explicitly enable nested VMX on
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* their hypervisor for Linux compat to work. */
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log_warn("[VMX] unknown hypervisor, VMX may not be truly available");
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log_warn("[VMX] skipping VMX init to avoid potential fatal exit");
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return 0;
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}
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int vmx_enable(void) {
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if (g_vmx_enabled) return 0;
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if (!vmx_truly_available()) {
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log_warn("[VMX] VMX not truly available, skipping VMX init");
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return -1;
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}
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/* 读 IA32_VMX_BASIC，获取 VMCS revision ID 与 region 大小 */
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g_vmx_basic = vmx_read_msr(IA32_VMX_BASIC);
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g_vmcs_revision = g_vmx_basic & 0x7FFFFFFFULL;
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u32 vmcs_size = (u32)((g_vmx_basic >> 32) & 0x1FFF);
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if (vmcs_size == 0) vmcs_size = 4096;
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log_hex64("[VMX] VMX_BASIC=", g_vmx_basic);
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log_hex64("[VMX] VMCS revision=", g_vmcs_revision);
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/* 分配 VMXON region（4KB 对齐，物理页） */
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dkm_dma_buffer vmxon_buf;
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if (dma_alloc_pages(1, EPT_PAGE_SIZE, 0x100000000ULL, &vmxon_buf) != 0) {
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log_error("[VMX] failed to alloc VMXON region");
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return -2;
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}
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g_vmxon_phys = vmxon_buf.phys;
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/* 在 VMXON region 偏移 0 写入 VMCS revision ID */
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u32 *vmxon_ptr = (u32 *)vmxon_buf.virt;
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vmxon_ptr[0] = (u32)g_vmcs_revision;
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log_hex64("[VMX] VMXON phys=", g_vmxon_phys);
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/* 设置 CR4.VMXE */
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u64 cr4 = vmx_required_cr4();
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write_cr4(cr4);
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log_hex64("[VMX] CR4=", cr4);
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/* 确保 CR0 满足 VMX 要求（这里只读不写，UEFI 已配置好） */
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(void)vmx_required_cr0();
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/* 执行 vmxon */
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int err;
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__asm__ volatile(
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"vmxon %1\n"
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"jnc 1f\n"
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"jmp 2f\n"
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"1:\n"
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"mov $0, %0\n"
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"jmp 3f\n"
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"2:\n"
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"mov $1, %0\n"
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"3:\n"
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: "=r"(err)
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: "m"(g_vmxon_phys)
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: "memory"
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);
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if (err) {
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/* 第二次尝试：读 vmx instruction error 通过 VMCS 不适用 vmxon；
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* 简化：返回失败。 */
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log_error("[VMX] vmxon failed");
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return -3;
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}
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g_vmx_enabled = 1;
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log_info("[VMX] VMX root mode enabled");
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return 0;
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}
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int vmx_disable(void) {
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if (!g_vmx_enabled) return 0;
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__asm__ volatile("vmxoff" ::: "memory");
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g_vmx_enabled = 0;
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/* 清 CR4.VMXE */
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u64 cr4 = read_cr4();
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cr4 &= ~CR4_VMXE;
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write_cr4(cr4);
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log_info("[VMX] VMX root mode disabled");
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return 0;
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}
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int vmx_vmcs_alloc(u64 *phys_out) {
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if (!phys_out) return -1;
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dkm_dma_buffer buf;
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if (dma_alloc_pages(1, EPT_PAGE_SIZE, 0x100000000ULL, &buf) != 0) {
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log_error("[VMX] failed to alloc VMCS region");
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return -2;
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}
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/* 偏移 0 写入 VMCS revision ID */
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u32 *p = (u32 *)buf.virt;
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p[0] = (u32)g_vmcs_revision;
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*phys_out = buf.phys;
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return 0;
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}
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int vmx_vmcs_load(u64 phys) {
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int err;
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__asm__ volatile(
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"vmptrld %1\n"
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"jnc 1f\n"
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"jmp 2f\n"
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"1:\n"
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"mov $0, %0\n"
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"jmp 3f\n"
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"2:\n"
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"mov $1, %0\n"
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"3:\n"
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: "=r"(err)
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: "m"(phys)
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: "memory"
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);
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if (err) {
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log_error("[VMX] vmptrld failed");
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return -1;
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}
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return 0;
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}
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u64 vmx_vmcs_read(u64 field) {
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u64 value;
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__asm__ volatile(
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"vmread %1, %0\n"
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: "=r"(value)
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: "r"(field)
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: "memory"
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);
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return value;
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}
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void vmx_vmcs_write(u64 field, u64 value) {
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__asm__ volatile(
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"vmwrite %1, %0\n"
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:: "r"(field), "r"(value)
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: "memory"
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);
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}
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int vmx_vmlaunch(void) {
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int err;
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__asm__ volatile(
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"vmlaunch\n"
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"jnc 1f\n"
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"jmp 2f\n"
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"1:\n"
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"mov $0, %0\n"
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"jmp 3f\n"
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"2:\n"
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"mov $1, %0\n"
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"3:\n"
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: "=r"(err)
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:: "memory"
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);
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return err;
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}
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int vmx_vmresume(void) {
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int err;
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__asm__ volatile(
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"vmresume\n"
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"jnc 1f\n"
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"jmp 2f\n"
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"1:\n"
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"mov $0, %0\n"
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"jmp 3f\n"
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"2:\n"
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"mov $1, %0\n"
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"3:\n"
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: "=r"(err)
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:: "memory"
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);
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return err;
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}
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/* 暴露给其它模块用的辅助 */
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u64 vmx_get_host_cr3(void) { return read_cr3(); }
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u64 vmx_get_host_rflags(void) { return read_rflags(); }
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