324 lines
12 KiB
C
324 lines
12 KiB
C
/* xj380_boot.c — VMCS configuration and vmlaunch for OpenXJ380 guest.
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*
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* 参照 linux_boot.c 模式。XJ380 内核入口 KernelMain 是 C++ extern "C"，
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* 以 SysV ABI 传 3 个引用参数（退化为指针）：
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* RDI = &FrameBufferConfig （HHDM 虚拟地址）
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* RSI = &EFI_SYSTEM_TABLE （伪表，RuntimeServices=NULL，内核仅存指针）
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* RDX = &BOOT_CONFIG （HHDM 虚拟地址）
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* RIP = 0xFFFFFFFF80000000（guest 虚拟地址，由 guest 页表内核区映射）。
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*
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* guest 终止（异常/三重故障/0xCF9 重启）后本函数返回，host 恢复。
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*/
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#include <utsm/xj380_loader.h>
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#include <utsm/vmx.h>
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#include <utsm/ept.h>
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#include <utsm/vmm.h>
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#include <utsm/log.h>
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#include <utsm/types.h>
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#include "../arch/x86_64/limine.h"
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extern volatile struct limine_hhdm_request g_hhdm_request;
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/* VM-Exit 汇编入口与 C 分发器（vmm.c / vmexit_asm.S） */
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extern void vmx_vm_exit_handler(void);
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extern int vmexit_dispatch(void);
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extern u64 vmexit_get_count(void);
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extern u8 g_host_stack[8192];
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/* 当前运行的 guest 是否为 XJ380（vmm.h 声明，vmexit.c handle_hlt 检查）。
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* 定义在本模块：XJ380 launch 置 1，guest 终止后清 0。 */
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volatile int g_xj380_guest_active;
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/* CR 辅助 */
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static inline u64 read_cr0_local(void) {
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u64 v;
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__asm__ volatile("mov %%cr0, %0" : "=r"(v));
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return v;
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}
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static inline u64 read_cr3_local(void) {
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u64 v;
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__asm__ volatile("mov %%cr3, %0" : "=r"(v));
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return v;
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}
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static inline u64 read_cr4_local(void) {
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u64 v;
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__asm__ volatile("mov %%cr4, %0" : "=r"(v));
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return v;
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}
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static u64 vmx_adjust_control(u64 value, u32 msr) {
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u32 allowed0 = (u32)vmx_read_msr(msr);
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u32 allowed1 = (u32)(vmx_read_msr(msr) >> 32);
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u32 adjusted = (u32)value | allowed0;
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adjusted &= allowed1;
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return adjusted;
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}
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/* MSR bitmap（4KB，全零 = 不拦截任何 MSR，与 Linux guest 一致） */
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static u8 g_xj380_msr_bitmap[4096] __attribute__((aligned(4096)));
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/* ===== VMCS host state ===== */
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static void xj380_vmcs_setup_host_state(void) {
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vmx_vmcs_write(VMCS_HOST_CR0, read_cr0_local() | CR0_PE | CR0_NE | CR0_PG);
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vmx_vmcs_write(VMCS_HOST_CR3, read_cr3_local());
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vmx_vmcs_write(VMCS_HOST_CR4, read_cr4_local() | CR4_VMXE);
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vmx_vmcs_write(VMCS_HOST_CS_SELECTOR, 0x08);
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vmx_vmcs_write(VMCS_HOST_SS_SELECTOR, 0x10);
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vmx_vmcs_write(VMCS_HOST_DS_SELECTOR, 0x10);
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vmx_vmcs_write(VMCS_HOST_ES_SELECTOR, 0x10);
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vmx_vmcs_write(VMCS_HOST_FS_SELECTOR, 0);
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vmx_vmcs_write(VMCS_HOST_GS_SELECTOR, 0);
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vmx_vmcs_write(VMCS_HOST_FS_BASE, 0);
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vmx_vmcs_write(VMCS_HOST_GS_BASE, 0);
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{
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struct __attribute__((packed)) { u16 limit; u64 base; } gdtr, idtr;
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__asm__ volatile("sgdt %0" : "=m"(gdtr));
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__asm__ volatile("sidt %0" : "=m"(idtr));
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vmx_vmcs_write(VMCS_HOST_GDTR_BASE, gdtr.base);
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vmx_vmcs_write(VMCS_HOST_IDTR_BASE, idtr.base);
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u16 tr_sel;
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u64 tr_base;
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__asm__ volatile("str %0" : "=r"(tr_sel));
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u64 gdt_base = gdtr.base;
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u64 *tss_desc = (u64 *)(gdt_base + (tr_sel & 0xFFF8));
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u64 low = tss_desc[0];
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u64 high = tss_desc[1];
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tr_base = (low >> 16) & 0xFFFFFF;
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tr_base |= ((low >> 32) & 0xFF) << 24;
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tr_base |= (high & 0xFFFFFFFF) << 32;
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vmx_vmcs_write(VMCS_HOST_TR_SELECTOR, tr_sel);
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vmx_vmcs_write(VMCS_HOST_TR_BASE, tr_base);
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}
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{
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u64 sysenter_cs;
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__asm__ volatile("rdmsr" : "=a"(sysenter_cs) : "c"(0x174));
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vmx_vmcs_write(VMCS_HOST_SYSENTER_CS, sysenter_cs & 0xFFFFFFFF);
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vmx_vmcs_write(VMCS_HOST_SYSENTER_ESP, 0);
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vmx_vmcs_write(VMCS_HOST_SYSENTER_EIP, 0);
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}
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{
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u32 low, high;
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__asm__ volatile("rdmsr" : "=a"(low), "=d"(high) : "c"(0xC0000080));
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u64 host_efer = ((u64)high << 32) | low;
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vmx_vmcs_write(VMCS_HOST_IA32_EFER, host_efer);
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}
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vmx_vmcs_write(VMCS_HOST_RSP, (u64)&g_host_stack[sizeof(g_host_stack) - 16]);
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vmx_vmcs_write(VMCS_HOST_RIP, (u64)vmx_vm_exit_handler);
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}
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/* ===== VMCS guest state ===== */
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static void xj380_vmcs_setup_guest_state(const struct xj380_guest_info *gi) {
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vmx_vmcs_write(VMCS_GUEST_CR0, CR0_PE | CR0_NE | CR0_PG | CR0_WP);
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vmx_vmcs_write(VMCS_GUEST_CR3, gi->pgt_gpa);
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vmx_vmcs_write(VMCS_GUEST_CR4, CR4_PAE | CR4_PGE | CR4_PSE);
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vmx_vmcs_write(VMCS_GUEST_CS_SELECTOR, 0x08);
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vmx_vmcs_write(VMCS_GUEST_SS_SELECTOR, 0x10);
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vmx_vmcs_write(VMCS_GUEST_DS_SELECTOR, 0x10);
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vmx_vmcs_write(VMCS_GUEST_ES_SELECTOR, 0x10);
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vmx_vmcs_write(VMCS_GUEST_FS_SELECTOR, 0);
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vmx_vmcs_write(VMCS_GUEST_GS_SELECTOR, 0);
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vmx_vmcs_write(VMCS_GUEST_LDTR_SELECTOR, 0);
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vmx_vmcs_write(VMCS_GUEST_TR_SELECTOR, 0x18);
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vmx_vmcs_write(VMCS_GUEST_CS_BASE, 0);
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vmx_vmcs_write(VMCS_GUEST_SS_BASE, 0);
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vmx_vmcs_write(VMCS_GUEST_DS_BASE, 0);
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vmx_vmcs_write(VMCS_GUEST_ES_BASE, 0);
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vmx_vmcs_write(VMCS_GUEST_FS_BASE, 0);
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vmx_vmcs_write(VMCS_GUEST_GS_BASE, 0);
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vmx_vmcs_write(VMCS_GUEST_LDTR_BASE, 0);
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vmx_vmcs_write(VMCS_GUEST_TR_BASE, gi->gdt_gpa + 0x100);
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vmx_vmcs_write(VMCS_GUEST_GDTR_BASE, gi->gdt_gpa);
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vmx_vmcs_write(VMCS_GUEST_IDTR_BASE, 0);
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vmx_vmcs_write(VMCS_GUEST_CS_LIMIT, 0xFFFFFFFF);
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vmx_vmcs_write(VMCS_GUEST_SS_LIMIT, 0xFFFFFFFF);
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vmx_vmcs_write(VMCS_GUEST_DS_LIMIT, 0xFFFFFFFF);
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vmx_vmcs_write(VMCS_GUEST_ES_LIMIT, 0xFFFFFFFF);
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vmx_vmcs_write(VMCS_GUEST_FS_LIMIT, 0xFFFFFFFF);
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vmx_vmcs_write(VMCS_GUEST_GS_LIMIT, 0xFFFFFFFF);
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vmx_vmcs_write(VMCS_GUEST_LDTR_LIMIT, 0xFFFF);
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vmx_vmcs_write(VMCS_GUEST_TR_LIMIT, 0x67);
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vmx_vmcs_write(VMCS_GUEST_GDTR_LIMIT, 0x28);
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vmx_vmcs_write(VMCS_GUEST_IDTR_LIMIT, 0xFFFF);
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vmx_vmcs_write(VMCS_GUEST_CS_ACCESS, 0xA09B); /* 64 位代码 L=1 */
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vmx_vmcs_write(VMCS_GUEST_SS_ACCESS, 0xC093);
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vmx_vmcs_write(VMCS_GUEST_DS_ACCESS, 0xC093);
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vmx_vmcs_write(VMCS_GUEST_ES_ACCESS, 0xC093);
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vmx_vmcs_write(VMCS_GUEST_FS_ACCESS, 0xC093);
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vmx_vmcs_write(VMCS_GUEST_GS_ACCESS, 0xC093);
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vmx_vmcs_write(VMCS_GUEST_LDTR_ACCESS, 0x82); /* unusable */
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vmx_vmcs_write(VMCS_GUEST_TR_ACCESS, 0x8B); /* busy 64-bit TSS */
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/* guest RIP = XJ380 内核入口（guest 虚拟地址，经内核区页表映射） */
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vmx_vmcs_write(VMCS_GUEST_RIP, gi->kernel_entry);
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vmx_vmcs_write(VMCS_GUEST_RSP, XJ380_BOOT_STACK_TOP);
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vmx_vmcs_write(VMCS_GUEST_RFLAGS, 0x2); /* IF=0 */
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vmx_vmcs_write(VMCS_GUEST_IA32_EFER, EFER_LME | EFER_LMA | EFER_NXE);
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vmx_vmcs_write(VMCS_GUEST_SYSENTER_CS, 0);
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vmx_vmcs_write(VMCS_GUEST_SYSENTER_ESP, 0);
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vmx_vmcs_write(VMCS_GUEST_SYSENTER_EIP, 0);
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vmx_vmcs_write(VMCS_GUEST_DR7, 0x400);
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vmx_vmcs_write(VMCS_GUEST_ACTIVITY_STATE, 0);
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vmx_vmcs_write(VMCS_GUEST_INTERRUPTIBILITY, 0);
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}
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/* ===== VMCS controls ===== */
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static void xj380_vmcs_setup_controls(u64 eptp) {
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u64 pin_want = PIN_EXT_INTERRUPT_EXITING | PIN_NMI_EXITING;
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if (vmx_preemption_timer_supported()) {
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pin_want |= PIN_VMX_PREEMPTION_TIMER;
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}
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u64 pin = vmx_adjust_control(pin_want, IA32_VMX_TRUE_PINBASED_CTLS);
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u64 cpu = CPU_BASED_HLT_EXITING
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| CPU_BASED_ACTIVATE_SECONDARY
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| CPU_BASED_USE_MSR_BITMAPS
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| CPU_BASED_UNCOND_IO_EXITING
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| CPU_BASED_INVLPG_EXITING;
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cpu = vmx_adjust_control(cpu, IA32_VMX_TRUE_PROCBASED_CTLS);
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u64 cpu2 = SEC_EXEC_ENABLE_EPT | SEC_EXEC_ENABLE_VPID;
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{
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u64 msr = vmx_read_msr(IA32_VMX_PROCBASED_CTLS2);
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u32 allowed1 = (u32)(msr >> 32);
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cpu2 &= allowed1;
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cpu2 |= SEC_EXEC_ENABLE_EPT;
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}
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u64 exit_ctrl = VM_EXIT_SAVE_DEBUG_CONTROLS
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| VM_EXIT_HOST_ADDR_SPACE_SIZE
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| VM_EXIT_LOAD_HOST_EFER;
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exit_ctrl = vmx_adjust_control(exit_ctrl, IA32_VMX_TRUE_EXIT_CTLS);
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u64 entry_ctrl = VM_ENTRY_LOAD_DEBUG_CONTROLS
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| VM_ENTRY_IA32E_MODE_GUEST
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| VM_ENTRY_LOAD_GUEST_EFER;
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entry_ctrl = vmx_adjust_control(entry_ctrl, IA32_VMX_TRUE_ENTRY_CTLS);
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vmx_vmcs_write(VMCS_PIN_BASED_VM_EXEC_CONTROL, pin);
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vmx_vmcs_write(VMCS_CPU_BASED_VM_EXEC_CONTROL, cpu);
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vmx_vmcs_write(VMCS_SECONDARY_VM_EXEC_CONTROL, cpu2);
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vmx_vmcs_write(VMCS_VM_EXIT_CONTROLS, exit_ctrl);
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vmx_vmcs_write(VMCS_VM_ENTRY_CONTROLS, entry_ctrl);
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{
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u64 hhdm = g_hhdm_request.response ? g_hhdm_request.response->offset : 0;
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u64 msr_bitmap_phys = (u64)g_xj380_msr_bitmap - hhdm;
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vmx_vmcs_write(VMCS_MSR_BITMAP, msr_bitmap_phys);
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}
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vmx_vmcs_write(VMCS_EPT_POINTER, eptp);
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vmx_vmcs_write(VMCS_VPID, 3); /* VPID 1=self-test, 2=Linux, 3=XJ380 */
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vmx_vmcs_write(VMCS_EXCEPTION_BITMAP, (1ULL << 13) | (1ULL << 14) | (1ULL << 6) | (1ULL << 8));
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}
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/* ===== 传给 vmlaunch asm 的参数 ===== */
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static volatile u64 g_xj380_rdi;
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static volatile u64 g_xj380_rsi;
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static volatile u64 g_xj380_rdx;
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/* ===== XJ380 launch =====
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*
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* 前置条件：vmm_init() + xj380_loader_init()。
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* guest 终止后返回 0；vmlaunch 失败返回负值。 */
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int xj380_launch(void) {
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const struct xj380_guest_info *gi = xj380_get_guest_info();
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if (!gi || !gi->loaded) {
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log_error("[XJ380] guest not loaded");
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return -1;
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}
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if (!vmm_is_ready()) {
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log_error("[XJ380] VMM not ready");
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return -2;
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}
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log_info("[XJ380] launch begin");
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/* 真机 EPT TLB 刷新：vmlaunch 前确保 EPT 映射可见 */
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ept_flush_ept();
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/* 重置 VM-Exit 状态 */
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g_guest_terminated = 0;
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g_last_exit_reason = 0xFFFFFFFFULL;
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g_linux_guest_active = 0; /* XJ380 是当前 active guest */
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g_guest_parked = 0;
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g_xj380_guest_active = 1;
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/* 配置 VMCS */
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xj380_vmcs_setup_guest_state(gi);
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xj380_vmcs_setup_controls(vmm_get_eptp());
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xj380_vmcs_setup_host_state();
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/* 初始 arm preemption timer（1ms 后首次周期 exit） */
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vmx_vmcs_write(VMCS_GUEST_PREEMPTION_TIMER, vmx_preemption_quantum_1ms());
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/* KernelMain 3 个 SysV 参数（HHDM 虚拟地址） */
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g_xj380_rdi = XJ380_FBC_GPA + XJ380_HHDM_OFFSET;
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g_xj380_rsi = XJ380_FAKEEFI_GPA + XJ380_HHDM_OFFSET;
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g_xj380_rdx = XJ380_BOOTCFG_GPA + XJ380_HHDM_OFFSET;
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log_hex64("[XJ380] RIP=", gi->kernel_entry);
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log_hex64("[XJ380] RSP=", XJ380_BOOT_STACK_TOP);
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log_hex64("[XJ380] RDI(fbc)=", g_xj380_rdi);
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log_hex64("[XJ380] RSI(efi)=", g_xj380_rsi);
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log_hex64("[XJ380] RDX(bootcfg)=", g_xj380_rdx);
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log_hex64("[XJ380] CR3=", gi->pgt_gpa);
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log_hex64("[XJ380] GDTR=", gi->gdt_gpa);
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log_info("[XJ380] vmlaunch (host suspended until guest terminates)");
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int failed;
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__asm__ volatile(
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"movq %%rsp, g_saved_host_rsp(%%rip)\n\t"
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"leaq 1f(%%rip), %%rax\n\t"
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"movq %%rax, g_saved_return_rip(%%rip)\n\t"
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"movq g_xj380_rdi(%%rip), %%rdi\n\t"
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"movq g_xj380_rsi(%%rip), %%rsi\n\t"
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"movq g_xj380_rdx(%%rip), %%rdx\n\t"
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"vmlaunch\n\t"
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/* ---- failure path ---- */
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"movl $1, %0\n\t"
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"jmp 2f\n\t"
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/* ---- post_guest: terminate path jmps here ---- */
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"1:\n\t"
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"movl $0, %0\n\t"
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"2:\n\t"
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: "=r"(failed)
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:: "rax", "rcx", "rdx", "rsi", "rdi",
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"r8", "r9", "r10", "r11", "memory"
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);
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if (failed) {
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u64 error = vmx_vmcs_read(VMCS_VMX_INSTRUCTION_ERROR);
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log_hex64("[XJ380] vmlaunch failed, error=", error);
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g_xj380_guest_active = 0;
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return -3;
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}
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/* guest 终止，host 恢复 */
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g_xj380_guest_active = 0;
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log_info("[XJ380] guest terminated, host resumed");
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log_hex64("[XJ380] last exit reason=", g_last_exit_reason);
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log_hex64("[XJ380] vmexit count=", vmexit_get_count());
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return 0;
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}
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