Record networking and DMA development progress
Add the current OS source tree, build scripts, system image layout, and development notes covering DMA page allocation, e1000 bring-up, net API dispatch, and DHCP work in progress.
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/* DKM APIC Driver — APIC discovery with PIC fallback
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* Stage 0, required, depends on "timer", provides "irq" and "apic".
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* Current kernel IRQ backend is still PIC; this driver only discovers APIC
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* topology and keeps PIC routing active.
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*/
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#include <stdint.h>
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#define DKM_DRIVER_MAGIC 0x444B4D31u
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#define DKM_ABI_VERSION 1u
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typedef unsigned char u8;
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typedef unsigned short u16;
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typedef unsigned int u32;
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typedef unsigned long long u64;
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typedef long long i64;
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#define NULL ((void *)0)
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struct dkm_log_api {
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void (*info)(const char *msg);
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void (*warn)(const char *msg);
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void (*error)(const char *msg);
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void (*panic)(const char *msg);
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};
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struct dkm_kernel_api {
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u32 version;
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u32 size;
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u64 feature_bits;
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const struct dkm_log_api *log;
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const void *mem;
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const void *utsm;
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const void *irq;
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const void *pci;
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const void *dma;
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const void *vfs;
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const void *net;
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const void *timer;
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const void *drr;
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const void *rsdp_address;
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const void *fb_address;
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u64 fb_width;
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u64 fb_height;
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u64 fb_pitch;
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u16 fb_bpp;
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const void *boot_modules_response;
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int (*irq_register)(u8 irq, void *handler);
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u64 hhdm_offset;
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};
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struct dkm_driver_handle;
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struct dkm_driver_desc {
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u32 magic;
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u16 abi_version;
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u16 desc_size;
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const char *name;
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const char *version;
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const char *vendor;
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u32 driver_class;
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u32 stage;
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u32 flags;
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u32 priority;
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const char *const *depends;
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u32 depends_count;
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const char *const *provides;
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u32 provides_count;
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u64 min_kernel_abi;
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u64 feature_bits;
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u64 reserved0;
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u64 reserved1;
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};
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static const char *const g_depends[] = { "timer" };
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static const char *const g_provides[] = { "irq", "apic" };
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__attribute__((visibility("default"), used))
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const struct dkm_driver_desc driver_desc = {
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.magic = DKM_DRIVER_MAGIC,
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.abi_version = DKM_ABI_VERSION,
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.desc_size = sizeof(struct dkm_driver_desc),
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.name = "apic",
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.version = "0.1.0",
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.vendor = "Deshab",
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.driver_class = 3, /* DKM_CLASS_INTERRUPT */
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.stage = 0,
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.flags = 1, /* DKM_F_REQUIRED */
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.priority = 0,
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.depends = g_depends,
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.depends_count = 1,
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.provides = g_provides,
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.provides_count = 2,
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.min_kernel_abi = 1,
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.feature_bits = 0,
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.reserved0 = 0,
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.reserved1 = 0
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};
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typedef struct __attribute__((packed)) {
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char signature[8];
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u8 checksum;
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char oem_id[6];
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u8 revision;
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u32 rsdt_addr;
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} acpi_rsdp_v1;
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typedef struct __attribute__((packed)) {
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char signature[8];
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u8 checksum;
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char oem_id[6];
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u8 revision;
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u32 rsdt_addr;
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u32 length;
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u64 xsdt_addr;
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u8 ext_checksum;
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u8 reserved[3];
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} acpi_rsdp_v2;
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typedef struct __attribute__((packed)) {
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char signature[4];
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u32 length;
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u8 revision;
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u8 checksum;
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char oem_id[6];
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char oem_table_id[8];
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u32 oem_revision;
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u32 creator_id;
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u32 creator_revision;
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} acpi_sdt_header;
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typedef struct __attribute__((packed)) {
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acpi_sdt_header hdr;
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u32 lapic_addr;
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u32 flags;
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} acpi_madt;
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struct madt_info {
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u64 lapic_phys;
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u32 flags;
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u32 lapic_count;
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u32 ioapic_count;
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u32 iso_count;
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};
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static const struct dkm_log_api *g_log;
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static int memeq(const char *a, const char *b, u32 n) {
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for (u32 i = 0; i < n; i++) {
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if (a[i] != b[i]) return 0;
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}
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return 1;
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}
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static u8 checksum8(const u8 *data, u32 len) {
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u8 sum = 0;
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for (u32 i = 0; i < len; i++) sum += data[i];
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return sum;
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}
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static void log_hex(const char *prefix, u64 val) {
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static const char hex[] = "0123456789abcdef";
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char buf[19];
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u32 pos = 0;
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buf[pos++] = '0';
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buf[pos++] = 'x';
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for (int i = 15; i >= 0; i--) {
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buf[pos++] = hex[(val >> (i * 4)) & 0xf];
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}
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buf[pos] = 0;
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g_log->info(prefix);
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g_log->info(buf);
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}
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static void cpuid(u32 leaf, u32 *a, u32 *b, u32 *c, u32 *d) {
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__asm__ volatile ("cpuid"
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: "=a"(*a), "=b"(*b), "=c"(*c), "=d"(*d)
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: "a"(leaf), "c"(0));
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}
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static u64 rdmsr(u32 msr) {
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u32 lo;
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u32 hi;
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__asm__ volatile ("rdmsr" : "=a"(lo), "=d"(hi) : "c"(msr));
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return ((u64)hi << 32) | lo;
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}
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static int cpu_has_lapic(void) {
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u32 a, b, c, d;
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cpuid(1, &a, &b, &c, &d);
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(void)a;
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(void)b;
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(void)c;
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return (d & (1u << 9)) != 0;
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}
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static const acpi_sdt_header *find_table_from_rsdt(const acpi_sdt_header *rsdt, const char sig[4], u32 entry_size) {
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if (!rsdt || rsdt->length < sizeof(acpi_sdt_header)) return NULL;
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if (checksum8((const u8 *)rsdt, rsdt->length) != 0) return NULL;
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u32 count = (rsdt->length - sizeof(acpi_sdt_header)) / entry_size;
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const u8 *entries = (const u8 *)rsdt + sizeof(acpi_sdt_header);
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for (u32 i = 0; i < count; i++) {
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u64 addr;
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if (entry_size == 4) {
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addr = (u64)((const u32 *)entries)[i];
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} else {
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addr = ((const u64 *)entries)[i];
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}
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if (!addr) continue;
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const acpi_sdt_header *hdr = (const acpi_sdt_header *)(uintptr_t)addr;
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if (hdr->length >= sizeof(acpi_sdt_header) && memeq(hdr->signature, sig, 4)) {
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if (checksum8((const u8 *)hdr, hdr->length) == 0) return hdr;
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}
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}
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return NULL;
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}
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static const acpi_madt *find_madt(const void *rsdp_addr) {
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if (!rsdp_addr) return NULL;
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const acpi_rsdp_v2 *rsdp = (const acpi_rsdp_v2 *)rsdp_addr;
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if (!memeq(rsdp->signature, "RSD PTR ", 8)) return NULL;
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if (checksum8((const u8 *)rsdp, 20) != 0) return NULL;
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if (rsdp->revision >= 2 && rsdp->length >= sizeof(acpi_rsdp_v2) && rsdp->xsdt_addr) {
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if (checksum8((const u8 *)rsdp, rsdp->length) == 0) {
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const acpi_sdt_header *xsdt = (const acpi_sdt_header *)(uintptr_t)rsdp->xsdt_addr;
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const acpi_sdt_header *madt = find_table_from_rsdt(xsdt, "APIC", 8);
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if (madt) return (const acpi_madt *)madt;
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}
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}
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if (rsdp->rsdt_addr) {
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const acpi_sdt_header *rsdt = (const acpi_sdt_header *)(uintptr_t)(u64)rsdp->rsdt_addr;
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const acpi_sdt_header *madt = find_table_from_rsdt(rsdt, "APIC", 4);
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if (madt) return (const acpi_madt *)madt;
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}
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return NULL;
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}
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static void parse_madt_entries(const acpi_madt *madt, struct madt_info *info) {
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const u8 *base = (const u8 *)madt;
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u32 off = (u32)sizeof(acpi_madt);
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while (off + 2 <= madt->hdr.length) {
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const u8 *entry = base + off;
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u8 type = entry[0];
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u8 len = entry[1];
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if (len < 2 || off + len > madt->hdr.length) {
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g_log->warn("[apic] malformed MADT entry");
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return;
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}
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if (type == 0 && len >= 8) {
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u8 apic_id = entry[3];
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u32 flags = *(const u32 *)(const void *)(entry + 4);
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if (flags & 1u) info->lapic_count++;
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log_hex("[apic] CPU LAPIC id=", apic_id);
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} else if (type == 1 && len >= 12) {
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u8 ioapic_id = entry[2];
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u32 addr = *(const u32 *)(const void *)(entry + 4);
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u32 gsi = *(const u32 *)(const void *)(entry + 8);
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info->ioapic_count++;
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log_hex("[apic] IOAPIC id=", ioapic_id);
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log_hex("[apic] IOAPIC addr=", addr);
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log_hex("[apic] IOAPIC gsi_base=", gsi);
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} else if (type == 2 && len >= 10) {
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u8 source = entry[3];
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u32 gsi = *(const u32 *)(const void *)(entry + 4);
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u16 flags = *(const u16 *)(const void *)(entry + 8);
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info->iso_count++;
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log_hex("[apic] ISO source=", source);
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log_hex("[apic] ISO gsi=", gsi);
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log_hex("[apic] ISO flags=", flags);
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} else if (type == 5 && len >= 12) {
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u64 override = *(const u64 *)(const void *)(entry + 4);
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info->lapic_phys = override;
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log_hex("[apic] LAPIC override=", override);
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}
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off += len;
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}
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}
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__attribute__((visibility("default")))
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int driver_init(const struct dkm_kernel_api *api,
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struct dkm_driver_handle *handle) {
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(void)handle;
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if (!api || !api->log) return -1;
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g_log = api->log;
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g_log->info("[apic] init begin");
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if (!api->irq_register) {
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g_log->error("[apic] kernel irq_register missing");
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return -1;
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}
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g_log->info("[apic] kernel IRQ backend present: PIC");
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if (!cpu_has_lapic()) {
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g_log->warn("[apic] CPUID local APIC not present; PIC fallback active");
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g_log->info("[apic] driver ready");
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return 0;
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}
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g_log->info("[apic] CPUID local APIC present");
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u64 apic_base = rdmsr(0x1B);
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u64 lapic_phys = apic_base & 0xFFFFF000ULL;
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log_hex("[apic] IA32_APIC_BASE=", apic_base);
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log_hex("[apic] LAPIC phys base=", lapic_phys);
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if (apic_base & (1ULL << 8)) g_log->info("[apic] bootstrap processor");
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if (apic_base & (1ULL << 11)) g_log->info("[apic] LAPIC enabled by firmware");
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struct madt_info info;
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info.lapic_phys = lapic_phys;
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info.flags = 0;
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info.lapic_count = 0;
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info.ioapic_count = 0;
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info.iso_count = 0;
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const acpi_madt *madt = find_madt(api->rsdp_address);
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if (madt) {
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g_log->info("[apic] MADT found");
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info.lapic_phys = (u64)madt->lapic_addr;
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info.flags = madt->flags;
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log_hex("[apic] MADT lapic_phys=", info.lapic_phys);
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log_hex("[apic] MADT flags=", info.flags);
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parse_madt_entries(madt, &info);
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log_hex("[apic] CPU LAPIC count=", info.lapic_count);
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log_hex("[apic] IOAPIC count=", info.ioapic_count);
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log_hex("[apic] ISO count=", info.iso_count);
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} else {
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g_log->warn("[apic] MADT not found; PIC fallback active");
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}
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if (api->hhdm_offset && info.lapic_phys) {
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volatile u32 *lapic = (volatile u32 *)(uintptr_t)(api->hhdm_offset + info.lapic_phys);
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log_hex("[apic] LAPIC ID reg=", lapic[0x20 / 4]);
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log_hex("[apic] LAPIC version reg=", lapic[0x30 / 4]);
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log_hex("[apic] LAPIC SVR reg=", lapic[0xF0 / 4]);
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} else {
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g_log->warn("[apic] HHDM unavailable; skip LAPIC MMIO read");
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}
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g_log->info("[apic] discovery complete; PIC routing retained");
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g_log->info("[apic] driver ready");
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return 0;
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}
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__attribute__((visibility("default")))
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int driver_exit(struct dkm_driver_handle *handle) {
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(void)handle;
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return 0;
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}
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