feat: Phase 1 网络端到端打通 + FirstInit/Login/DevMode 完善
- 用户态共享网络协议栈 CODE/tools/net_stack.h（eth/ARP/IPv4/ICMP/UDP-DNS/TCP static inline，轮询模型） - shell 内建 ping/curl/run 命令；ping.elf/curl.elf 对齐 net_stack.h 真实协议栈 - shell dev_mode 串口镜像（g_serial_mirror）便于自动化验证 - DSK 启动流程：firstInit.txt 双行格式（firstInit + dev_mode），dev_mode=1 触发 shell 自动回归测试 - FirstInit 完成→持久化 USER.CONF + 翻转 firstInit 0->1（保留 dev_mode） - firstInit=1 时 DSK 加载 login.elf 进行用户选择 + 密码校验后再进 desktop - 新增 CODE/login/ 登录应用、CODE/DKM/dkm_shared.h、Logo.png - ahci/e1000/virtio_net/fat32/console_fb 驱动更新；utsm serial/block/dsk_loader 调整 - build.ps1 打包 ping.elf/curl.elf 进 SATA FAT32 根目录 - 移除 CODE/tools/bash（与 shell.elf 重复）
This commit is contained in:
xyou
+38
-151
@@ -17,105 +17,7 @@
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* 部分高级特性（ANI/MRR/AGC 调优）留待硬件验证后增量完善。
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*/
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#include <stdint.h>
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#define DKM_DRIVER_MAGIC 0x444B4D31u
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#define DKM_ABI_VERSION 1u
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typedef unsigned char u8;
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typedef unsigned short u16;
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typedef unsigned int u32;
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typedef unsigned long long u64;
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typedef long long i64;
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typedef signed char i8;
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#define NULL ((void *)0)
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/* ---- DKM ABI ---- */
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struct dkm_log_api {
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void (*info)(const char *msg);
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void (*warn)(const char *msg);
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void (*error)(const char *msg);
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void (*panic)(const char *msg);
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};
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struct dkm_net_scan_result {
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char ssid[33];
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u8 bssid[6];
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u8 channel;
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i8 rssi;
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u8 security;
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};
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struct dkm_net_device_desc {
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const char *name;
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u8 mac[6];
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u32 flags;
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void *ctx;
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int (*tx)(void *ctx, const void *packet, u32 length);
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int (*rx_poll)(void *ctx, void *buffer, u32 capacity, u32 *out_length);
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int (*scan_start)(void *ctx);
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int (*scan_count)(void *ctx);
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int (*scan_result)(void *ctx, u32 n, struct dkm_net_scan_result *out);
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int (*is_wireless)(void *ctx);
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};
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struct dkm_net_api {
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int (*register_device)(const struct dkm_net_device_desc *desc);
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u32 (*device_count)(void);
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int (*device_info)(u32 index, void *out);
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int (*tx)(u32 index, const void *packet, u32 length);
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int (*rx_poll)(u32 index, void *buffer, u32 capacity, u32 *out_length);
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int (*scan_start)(u32 index);
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int (*scan_count)(u32 index);
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int (*scan_result)(u32 index, u32 n, struct dkm_net_scan_result *out);
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int (*is_wireless)(u32 index);
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};
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struct dkm_dma_buffer {
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void *virt;
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u64 phys;
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u64 size;
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};
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struct dkm_dma_api {
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int (*alloc_pages)(u64 page_count, u64 alignment, u64 max_phys, struct dkm_dma_buffer *out);
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};
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#define DKM_NET_F_LINK_UP (1u << 0)
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#define DKM_NET_F_TX_READY (1u << 1)
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#define DKM_NET_F_RX_READY (1u << 2)
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#define DKM_NET_F_WIRELESS (1u << 3)
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#define DKM_NET_SEC_OPEN 0u
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#define DKM_NET_SEC_WEP 1u
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#define DKM_NET_SEC_WPA 2u
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#define DKM_NET_SEC_WPA2 3u
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#define DKM_NET_SEC_WPA3 4u
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struct dkm_kernel_api {
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u32 version; u32 size; u64 feature_bits;
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const struct dkm_log_api *log;
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const void *mem,*utsm,*irq_api,*pci_api;
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const struct dkm_dma_api *dma;
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const void *vfs_api;
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const struct dkm_net_api *net;
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const void *timer,*drr;
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const void *rsdp_address,*fb_address;
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u64 fb_width,fb_height,fb_pitch; u16 fb_bpp;
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const void *boot_modules_response;
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int (*irq_register)(u8 irq, void *handler);
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u64 hhdm_offset;
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};
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struct dkm_driver_handle;
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struct dkm_driver_desc {
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u32 magic; u16 abi_version; u16 desc_size;
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const char *name,*version,*vendor;
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u32 driver_class,stage,flags,priority;
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const char *const *depends; u32 depends_count;
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const char *const *provides; u32 provides_count;
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u64 min_kernel_abi,feature_bits,reserved0,reserved1;
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};
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#include "../dkm_shared.h"
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static const char *const g_depends[] = {"pci","irq"};
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static const char *const g_provides[] = {"netdev"};
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@@ -129,19 +31,6 @@ const struct dkm_driver_desc driver_desc = {
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.provides=g_provides,.provides_count=1,.min_kernel_abi=1,
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};
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/* ---- PCI config ---- */
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#define PCI_ADDR 0xCF8
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#define PCI_DATA 0xCFC
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#define PCI_VENDOR_ID 0x00
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#define PCI_COMMAND 0x04
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#define PCI_BAR0 0x10
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#define PCI_BAR1 0x14
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#define PCI_IRQ_LINE 0x3C
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#define PCI_CMD_IO (1u << 0)
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#define PCI_CMD_MEM (1u << 1)
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#define PCI_CMD_BUSMST (1u << 2)
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/* ---- ath9k 寄存器（AR9280/9285/9287 PCIe MAC，Linux ath9k reg.h 关键子集） ---- */
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#define AR_RC 0x4000u
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#define AR_RC_MAC 0x00000001u
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@@ -285,20 +174,20 @@ static u32 g_scan_count;
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static int g_scanning;
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/* ---- 串口日志（参考 e1000 raw_log） ---- */
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static __inline__ void outb(u16 p, u8 v) { __asm__ volatile("outb %0,%1"::"a"(v),"Nd"(p):"memory"); }
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static __inline__ u8 inb(u16 p) { u8 v; __asm__ volatile("inb %1,%0":"=a"(v):"Nd"(p):"memory"); return v; }
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static __inline__ void outl(u16 p, u32 v) { __asm__ volatile("outl %0,%1"::"a"(v),"Nd"(p):"memory"); }
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static __inline__ u32 inl(u16 p) { u32 v; __asm__ volatile("inl %1,%0":"=a"(v):"Nd"(p):"memory"); return v; }
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#define COM1 0x3F8
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/* 串口发送等待 thin wrapper — 调用 dkm 共享实现 */
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static void serial_wait_tx(void) { dkm_serial_wait_tx(COM1); }
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static void raw_log(const char *s) {
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while (*s) {
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char c = *s++;
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if (c == '\n') {
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for (u32 i=0;i<100000;i++) if (inb(0x3F8+5)&0x20) break;
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outb(0x3F8, '\r');
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serial_wait_tx();
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dkm_outb(COM1, '\r');
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}
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for (u32 i=0;i<100000;i++) if (inb(0x3F8+5)&0x20) break;
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outb(0x3F8, (u8)c);
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serial_wait_tx();
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dkm_outb(COM1, (u8)c);
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}
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}
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@@ -307,26 +196,19 @@ static void raw_hex(const char *prefix, u64 v) {
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raw_log(prefix);
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raw_log("0x");
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for (int i=15; i>=0; i--) {
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for (u32 wait=0; wait<100000; wait++) if (inb(0x3F8+5)&0x20) break;
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outb(0x3F8, (u8)h[(v >> (i * 4)) & 0xf]);
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serial_wait_tx();
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dkm_outb(COM1, (u8)h[(v >> (i * 4)) & 0xf]);
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}
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raw_log("\n");
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}
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static void delay_us(u32 us) {
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/* 粗略延时：每个 iteration ~1us on QEMU x86 */
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for (u32 i = 0; i < us * 10; i++) __asm__ volatile("pause");
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}
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/* ---- PCI 配置空间 ---- */
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static u32 pci_read(u8 bus, u8 dev, u8 func, u8 reg) {
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u32 a = (1u<<31)|((u32)bus<<16)|((u32)dev<<11)|((u32)func<<8)|((u32)reg&0xFC);
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outl(PCI_ADDR,a); return inl(PCI_DATA);
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return dkm_pci_read(bus, dev, func, reg);
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}
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static void pci_write(u8 bus, u8 dev, u8 func, u8 reg, u32 v) {
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u32 a = (1u<<31)|((u32)bus<<16)|((u32)dev<<11)|((u32)func<<8)|((u32)reg&0xFC);
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outl(PCI_ADDR,a); outl(PCI_DATA,v);
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dkm_pci_write(bus, dev, func, reg, v);
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}
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/* ath9k PCI 设备 ID 表（vendor 0x168c Atheros） */
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@@ -403,11 +285,12 @@ static u16 ath9k_eeprom_read(u16 addr) {
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/* AR5416_EEPROM_CMD: bit0=READ, bit1=BUSY, bit2=RESET */
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/* 启动 read：写 cmd=READ | addr<<3 */
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ath9k_reg_write(AR_EEPROM_CMD, AR_EEPROM_CMD_RESET);
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delay_us(5);
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dkm_delay_us(5);
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u32 cmd = AR_EEPROM_CMD_READ | ((u32)(addr & 0x3FF) << 3);
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ath9k_reg_write(AR_EEPROM_CMD, cmd);
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/* 等待 RDBUSY 清除 */
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for (u32 i = 0; i < 100000; i++) {
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/* 等待 RDBUSY 清除 (实机: 100ms TSC 超时) */
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u64 deadline = dkm_rdtsc() + dkm_tsc_per_ms * 100;
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while (dkm_rdtsc() < deadline) {
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u32 sts = ath9k_reg_read(AR_EEPROM_STS);
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if (!(sts & AR_EEPROM_STS_RDBUSY)) {
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if (sts & AR_EEPROM_STS_VALID) {
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@@ -415,7 +298,7 @@ static u16 ath9k_eeprom_read(u16 addr) {
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}
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return 0xffff;
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}
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delay_us(1);
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dkm_delay_us(1);
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}
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return 0xffff;
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}
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@@ -425,27 +308,29 @@ static int ath9k_reset(void) {
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raw_log("[ath9k.raw] reset sequence\n");
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/* 1. 强制唤醒（Power-On） */
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ath9k_reg_write(AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON | AR_RTC_FORCE_WAKE_INT);
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delay_us(50);
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/* 2. 等待 RTC 进入 ON 状态 */
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for (u32 i = 0; i < 100000; i++) {
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dkm_delay_us(50);
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/* 2. 等待 RTC 进入 ON 状态 (实机: 100ms TSC 超时) */
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u64 deadline = dkm_rdtsc() + dkm_tsc_per_ms * 100;
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while (dkm_rdtsc() < deadline) {
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u32 s = ath9k_reg_read(AR_RTC_STATUS);
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if ((s & 0x3) == AR_RTC_STATUS_ON) break;
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delay_us(1);
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dkm_delay_us(1);
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}
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/* 3. 全 chip 复位 */
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ath9k_reg_write(AR_RC, AR_RC_MAC | AR_RC_BB | AR_RC_RPCU);
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delay_us(100);
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dkm_delay_us(100);
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ath9k_reg_write(AR_RC, 0);
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delay_us(100);
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dkm_delay_us(100);
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/* 4. 重新唤醒 */
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ath9k_reg_write(AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON | AR_RTC_FORCE_WAKE_INT);
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delay_us(50);
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/* 5. 等待 RTC ON */
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dkm_delay_us(50);
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/* 5. 等待 RTC ON (实机: 100ms TSC 超时) */
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u32 ok = 0;
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for (u32 i = 0; i < 100000; i++) {
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u64 deadline2 = dkm_rdtsc() + dkm_tsc_per_ms * 100;
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while (dkm_rdtsc() < deadline2) {
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u32 s = ath9k_reg_read(AR_RTC_STATUS);
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if ((s & 0x3) == AR_RTC_STATUS_ON) { ok = 1; break; }
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delay_us(1);
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dkm_delay_us(1);
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}
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if (!ok) { raw_log("[ath9k.raw] reset: RTC not ON\n"); return -1; }
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raw_log("[ath9k.raw] reset: RTC ON\n");
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@@ -461,7 +346,7 @@ static int ath9k_hw_init(void) {
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raw_log("[ath9k.raw] hw_init minimal\n");
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/* 关闭 RX/DMA，清 STA_ID1 */
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ath9k_reg_write(AR_CR, AR_CR_RXD);
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delay_us(10);
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dkm_delay_us(10);
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ath9k_reg_write(AR_STA_ID1, 0);
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/* 清中断 */
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ath9k_reg_write(AR_ISR, 0xFFFFFFFFu);
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@@ -650,13 +535,13 @@ static void ath9k_set_channel(u8 channel) {
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/* TODO: 完整 ath9k 信道切换序列（参考 ar9002_hw_set_channel） */
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/* 触发 RFBUS 请求，等待 grant */
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ath9k_reg_write(AR_PHY_RFBUS_REQ, 0x1);
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delay_us(5);
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dkm_delay_us(5);
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for (u32 i = 0; i < 1000; i++) {
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if (ath9k_reg_read(AR_PHY_RFBUS_REQ) & 0x2) break;
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delay_us(1);
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dkm_delay_us(1);
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}
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ath9k_reg_write(AR_PHY_RFBUS_REQ, 0);
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delay_us(50);
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dkm_delay_us(50);
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}
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/* ---- 被动扫描状态机 ----
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@@ -684,7 +569,7 @@ static int ath9k_scan_start_impl(void *ctx) {
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/* 在该信道停留 ~400ms，期间轮询 RX 环 */
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for (u32 tick = 0; tick < 400; tick++) {
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ath9k_rx_drain();
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delay_us(1000);
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dkm_delay_us(1000);
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}
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}
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g_scanning = 0;
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@@ -752,6 +637,8 @@ __attribute__((visibility("default")))
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int driver_init(const struct dkm_kernel_api *api,
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struct dkm_driver_handle *handle) {
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(void)handle;
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/* 实机要求: 先校准 TSC, 再使用基于 CPU 频率的延迟 */
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dkm_tsc_calibrate();
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raw_log("[ath9k.raw] driver_init entered\n");
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if (!api || !api->log) return -1;
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g_log = api->log;
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@@ -766,7 +653,7 @@ int driver_init(const struct dkm_kernel_api *api,
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/* 2. 启用 PCI 命令（MEM + Bus Master） */
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u32 cmd = pci_read(bus, dev, 0, PCI_COMMAND);
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pci_write(bus, dev, 0, PCI_COMMAND, cmd | PCI_CMD_MEM | PCI_CMD_BUSMST);
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pci_write(bus, dev, 0, PCI_COMMAND, cmd | PCI_CMD_MEM | PCI_CMD_BUSM);
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/* 3. 读取 BAR0 */
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u32 bar0 = pci_read(bus, dev, 0, PCI_BAR0);
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Block a user