2026-07-02 15:40:39 +08:00
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/* DKM PCI Driver — PCI bus enumeration via config space (0xCF8/0xCFC)
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* Stage 0, required, depends on "irq", provides "pci".
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* No IRQ needed for enumeration. Scans all buses/devices/functions.
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2026-07-31 13:53:49 +08:00
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*
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* 真机增强:
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* - 多总线扫描（桥接设备下游 bus > 0）
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* - 网卡型号识别（常见 Intel/Realtek 网卡芯片自动标注）
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* - PCI 桥检测和副总线号读取
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2026-07-02 15:40:39 +08:00
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*/
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#include <stdint.h>
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/* ---------------------------------------------------------------
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* DKM ABI types
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* --------------------------------------------------------------- */
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#define DKM_DRIVER_MAGIC 0x444B4D31u
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#define DKM_ABI_VERSION 1u
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typedef unsigned char u8;
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typedef unsigned short u16;
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typedef unsigned int u32;
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typedef unsigned long long u64;
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typedef long long i64;
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#define NULL ((void *)0)
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struct dkm_log_api {
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void (*info)(const char *msg);
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void (*warn)(const char *msg);
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void (*error)(const char *msg);
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void (*panic)(const char *msg);
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};
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struct dkm_kernel_api {
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u32 version;
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u32 size;
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u64 feature_bits;
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const struct dkm_log_api *log;
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const void *mem;
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const void *utsm;
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const void *irq;
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const void *pci_api;
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const void *dma;
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const void *vfs;
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const void *net;
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const void *timer;
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const void *drr;
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const void *rsdp_address;
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};
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struct dkm_driver_handle;
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struct dkm_driver_desc {
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u32 magic;
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u16 abi_version;
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u16 desc_size;
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const char *name;
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const char *version;
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const char *vendor;
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u32 driver_class;
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u32 stage;
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u32 flags;
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u32 priority;
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const char *const *depends;
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u32 depends_count;
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const char *const *provides;
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u32 provides_count;
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u64 min_kernel_abi;
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u64 feature_bits;
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u64 reserved0;
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u64 reserved1;
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};
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/* ---------------------------------------------------------------
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* PCI constants
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* --------------------------------------------------------------- */
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#define PCI_CFG_ADDR 0xCF8
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#define PCI_CFG_DATA 0xCFC
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#define PCI_VENDOR_ID 0x00
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#define PCI_DEVICE_ID 0x02
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#define PCI_COMMAND 0x04
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#define PCI_STATUS 0x06
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#define PCI_CLASS 0x0B /* class code */
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#define PCI_SUBCLASS 0x0A /* subclass */
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#define PCI_PROG_IF 0x09 /* prog IF */
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#define PCI_HEADER_TYPE 0x0E
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#define PCI_BAR0 0x10
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2026-07-31 13:53:49 +08:00
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/* PCI 桥配置 (header type 1) */
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#define PCI_PRI_BUS 0x18
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#define PCI_SEC_BUS 0x19
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#define PCI_SUB_BUS 0x1A
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#define PCI_CMD_IO (1u << 0)
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#define PCI_CMD_MEM (1u << 1)
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#define PCI_CMD_BUSM (1u << 2)
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2026-07-02 15:40:39 +08:00
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/* ---------------------------------------------------------------
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* Driver descriptor
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* --------------------------------------------------------------- */
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static const char *const g_depends[] = { "irq" };
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static const char *const g_provides[] = { "pci" };
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__attribute__((visibility("default"), used))
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const struct dkm_driver_desc driver_desc = {
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.magic = DKM_DRIVER_MAGIC,
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.abi_version = DKM_ABI_VERSION,
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.desc_size = sizeof(struct dkm_driver_desc),
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.name = "pci",
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2026-07-31 13:53:49 +08:00
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.version = "0.2.0",
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2026-07-02 15:40:39 +08:00
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.vendor = "Deshab",
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.driver_class = 2, /* DKM_CLASS_BUS */
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.stage = 0,
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.flags = 1, /* DKM_F_REQUIRED */
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.priority = 0,
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.depends = g_depends,
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.depends_count = 1,
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.provides = g_provides,
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.provides_count = 1,
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.min_kernel_abi = 1,
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.feature_bits = 0,
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.reserved0 = 0,
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.reserved1 = 0
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};
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/* ---------------------------------------------------------------
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* I/O helpers
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* --------------------------------------------------------------- */
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static const struct dkm_log_api *g_log;
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static __inline__ void outl(u16 port, u32 value) {
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__asm__ volatile ("outl %0, %1" :: "a"(value), "Nd"(port));
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}
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static __inline__ u32 inl(u16 port) {
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u32 value;
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__asm__ volatile ("inl %1, %0" : "=a"(value) : "Nd"(port));
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return value;
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}
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/* ---------------------------------------------------------------
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* PCI config access
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* --------------------------------------------------------------- */
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static u32 pci_cfg_read(u8 bus, u8 dev, u8 func, u8 reg) {
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u32 addr = (u32)((1u << 31)
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| ((u32)bus << 16)
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| ((u32)dev << 11)
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| ((u32)func << 8)
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| ((u32)reg & 0xFC));
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outl(PCI_CFG_ADDR, addr);
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return inl(PCI_CFG_DATA);
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}
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static void pci_cfg_write(u8 bus, u8 dev, u8 func, u8 reg, u32 val) {
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u32 addr = (u32)((1u << 31)
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| ((u32)bus << 16)
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| ((u32)dev << 11)
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| ((u32)func << 8)
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| ((u32)reg & 0xFC));
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outl(PCI_CFG_ADDR, addr);
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outl(PCI_CFG_DATA, val);
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}
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/* ---------------------------------------------------------------
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* Log helpers
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* --------------------------------------------------------------- */
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static void log_hex(const char *prefix, u64 val) {
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static const char hex[] = "0123456789abcdef";
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char buf[19];
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u32 pos = 0;
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buf[pos++] = '0'; buf[pos++] = 'x';
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for (int i = 15; i >= 0; i--) {
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buf[pos++] = hex[(val >> (i * 4)) & 0xf];
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}
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buf[pos] = 0;
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g_log->info(prefix);
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g_log->info(buf);
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}
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2026-07-31 13:53:49 +08:00
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/* ---- 网卡型号识别 ---- */
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struct netchip_id {
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u16 vendor;
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u16 device;
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const char *name;
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u8 driver_hint; /* 0=e1000, 1=e1000e, 2=r8169, 3=igb, 4=ath9k */
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};
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static const struct netchip_id g_netchips[] = {
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/* Intel e1000 经典 (8254x) */
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{0x8086, 0x100E, "82540EM", 0},
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{0x8086, 0x1004, "82543GC", 0},
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{0x8086, 0x100F, "82545EM", 0},
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{0x8086, 0x1010, "82546EB", 0},
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{0x8086, 0x1013, "82541EI", 0},
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{0x8086, 0x1019, "82547EI", 0},
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{0x8086, 0x1026, "82545GM", 0},
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{0x8086, 0x1075, "82547GI", 0},
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{0x8086, 0x1076, "82541GI", 0},
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{0x8086, 0x1079, "82546GB", 0},
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{0x8086, 0x108B, "82573E", 0},
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{0x8086, 0x109A, "82573L", 0},
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/* Intel e1000e (8257x/I217/I218/I219) */
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{0x8086, 0x10D3, "82574L", 1},
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{0x8086, 0x10F5, "82578DM", 1},
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{0x8086, 0x10F6, "82578DC", 1},
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{0x8086, 0x1502, "82579V", 1},
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{0x8086, 0x1533, "I217-V", 1},
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{0x8086, 0x1534, "I217-LM", 1},
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{0x8086, 0x153A, "I218-V", 1},
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{0x8086, 0x153B, "I218-LM", 1},
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{0x8086, 0x156F, "I219-V", 1},
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{0x8086, 0x1570, "I219-LM", 1},
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{0x8086, 0x157B, "I219-V-2", 1},
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{0x8086, 0x15D3, "I219-V-3", 1},
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{0x8086, 0x15D8, "I219-LM-3", 1},
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{0x8086, 0x15BD, "I219-V-6", 1},
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/* Intel I210/I211 (igb) */
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{0x8086, 0x1537, "I210", 3},
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{0x8086, 0x1536, "I211-AT", 3},
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/* Intel 82575/82576/82580 (igb) */
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{0x8086, 0x10A7, "82575EB", 3},
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{0x8086, 0x10C9, "82576", 3},
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{0x8086, 0x150D, "82580", 3},
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{0x8086, 0x1526, "82576-2", 3},
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/* Realtek RTL8111/8168/8125 (r8169) — 常见桌面/笔记本有线网卡 */
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{0x10EC, 0x8167, "RTL8111/8168B", 2},
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{0x10EC, 0x8168, "RTL8111/8168", 2},
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{0x10EC, 0x8169, "RTL8169", 2},
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{0x10EC, 0x8125, "RTL8125", 2},
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{0x10EC, 0x3000, "RTL8169S", 2},
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{0x10EC, 0x8136, "RTL8101E", 2},
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/* Qualcomm Atheros WiFi (ath9k) */
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{0x168C, 0x0023, "AR5416", 4},
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{0x168C, 0x0024, "AR5418", 4},
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{0x168C, 0x0027, "AR9160", 4},
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{0x168C, 0x0029, "AR9280", 4},
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{0x168C, 0x002A, "AR9285", 4},
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{0x168C, 0x002B, "AR9287", 4},
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{0x168C, 0x002D, "AR9287-2", 4},
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{0x168C, 0x002E, "AR9287-3", 4},
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{0x168C, 0x0030, "AR9300", 4},
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{0x168C, 0x0032, "AR9485", 4},
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{0x168C, 0x0034, "AR9462", 4},
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{0x168C, 0x0036, "AR9485-2", 4},
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{0x168C, 0x0037, "AR1111", 4},
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/* Broadcom WiFi — 目前无驱动，标注识别 */
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{0x14E4, 0x4315, "BCM4312-WiFi", 0xFF},
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{0x14E4, 0x4365, "BCM4365-WiFi", 0xFF},
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{0x14E4, 0x43A0, "BCM4360-WiFi", 0xFF},
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{0x14E4, 0x43C3, "BCM4366-WiFi", 0xFF},
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/* Qualcomm WiFi — 无驱动 */
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{0x168C, 0x003E, "QCA6174-WiFi", 0xFF},
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{0x168C, 0x0042, "QCA6390-WiFi", 0xFF},
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/* Intel WiFi — 无驱动 */
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{0x8086, 0x24FD, "Intel-8265-WiFi", 0xFF},
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{0x8086, 0x2526, "Intel-AX200-WiFi",0xFF},
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{0x8086, 0x2725, "Intel-AX210-WiFi",0xFF},
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{0x8086, 0x51F0, "Intel-AX211-WiFi",0xFF},
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{0x8086, 0x7A70, "Intel-BE200-WiFi",0xFF},
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{0, 0, 0, 0} /* 终止符 */
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};
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static const char *netchip_name(u16 vendor, u16 device) {
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for (int i = 0; g_netchips[i].name != 0; i++) {
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if (g_netchips[i].vendor == vendor && g_netchips[i].device == device)
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return g_netchips[i].name;
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}
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return 0;
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}
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static u8 netchip_driver(u16 vendor, u16 device) {
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for (int i = 0; g_netchips[i].name != 0; i++) {
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if (g_netchips[i].vendor == vendor && g_netchips[i].device == device)
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return g_netchips[i].driver_hint;
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}
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return 0xFF;
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}
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2026-07-02 15:40:39 +08:00
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static const char *pci_class_name(u8 base, u8 sub) {
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switch (base) {
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case 0x00: return "Legacy";
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case 0x01: return "Storage";
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case 0x02: return "Network";
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case 0x03: return "Display";
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case 0x04: return "Multimedia";
|
|
|
|
|
case 0x05: return "Memory";
|
|
|
|
|
case 0x06: return "Bridge";
|
|
|
|
|
case 0x07: return "SimpleComm";
|
|
|
|
|
case 0x08: return "BasePeriph";
|
|
|
|
|
case 0x09: return "Input";
|
|
|
|
|
case 0x0A: return "Docking";
|
|
|
|
|
case 0x0B: return "CPU";
|
|
|
|
|
case 0x0C: return "SerialBus";
|
|
|
|
|
case 0x0D: return "Wireless";
|
|
|
|
|
case 0x0E: return "IntelligentIO";
|
|
|
|
|
case 0x0F: return "Satellite";
|
|
|
|
|
case 0x10: return "Crypto";
|
|
|
|
|
case 0x11: return "SignalProc";
|
|
|
|
|
case 0x12: return "Accelerator";
|
|
|
|
|
default: return "Unknown";
|
|
|
|
|
}
|
|
|
|
|
(void)sub;
|
|
|
|
|
}
|
|
|
|
|
|
2026-07-31 13:53:49 +08:00
|
|
|
/* PCI subclass names for Network class */
|
|
|
|
|
static const char *net_subclass_name(u8 sub) {
|
|
|
|
|
switch (sub) {
|
|
|
|
|
case 0x00: return "Ethernet";
|
|
|
|
|
case 0x01: return "TokenRing";
|
|
|
|
|
case 0x02: return "FDDI";
|
|
|
|
|
case 0x03: return "ATM";
|
|
|
|
|
case 0x04: return "ISDN";
|
|
|
|
|
case 0x05: return "WorldFIP";
|
|
|
|
|
case 0x06: return "PICMG";
|
|
|
|
|
case 0x80: return "Other";
|
|
|
|
|
default: return "Net-?";
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2026-07-02 15:40:39 +08:00
|
|
|
/* ---------------------------------------------------------------
|
|
|
|
|
* Enumeration
|
|
|
|
|
* --------------------------------------------------------------- */
|
2026-07-31 13:53:49 +08:00
|
|
|
static u32 g_device_count;
|
|
|
|
|
|
2026-07-02 15:40:39 +08:00
|
|
|
static void pci_scan_bus(u8 bus) {
|
|
|
|
|
for (u8 dev = 0; dev < 32; dev++) {
|
|
|
|
|
u32 vid_dev = pci_cfg_read(bus, dev, 0, PCI_VENDOR_ID);
|
|
|
|
|
u16 vendor = (u16)(vid_dev & 0xffff);
|
|
|
|
|
if (vendor == 0xffff) continue;
|
|
|
|
|
|
|
|
|
|
u8 header_type = (u8)(pci_cfg_read(bus, dev, 0, PCI_HEADER_TYPE) >> 16);
|
|
|
|
|
int multi_func = (header_type & 0x80) != 0;
|
|
|
|
|
|
|
|
|
|
u8 func_count = multi_func ? 8 : 1;
|
|
|
|
|
for (u8 func = 0; func < func_count; func++) {
|
|
|
|
|
u32 vid_dev2 = pci_cfg_read(bus, dev, func, PCI_VENDOR_ID);
|
|
|
|
|
u16 vendor2 = (u16)(vid_dev2 & 0xffff);
|
|
|
|
|
if (vendor2 == 0xffff) continue;
|
|
|
|
|
|
|
|
|
|
u16 device = (u16)(vid_dev2 >> 16);
|
|
|
|
|
u32 cc = pci_cfg_read(bus, dev, func, PCI_CLASS);
|
|
|
|
|
u8 class_code = (u8)(cc >> 24);
|
|
|
|
|
u8 subclass = (u8)((cc >> 16) & 0xff);
|
2026-07-31 13:53:49 +08:00
|
|
|
u8 prog_if = (u8)((cc >> 8) & 0xff);
|
2026-07-02 15:40:39 +08:00
|
|
|
|
2026-07-31 13:53:49 +08:00
|
|
|
g_device_count++;
|
2026-07-02 15:40:39 +08:00
|
|
|
g_log->info("[pci]");
|
|
|
|
|
log_hex("[pci] bus=", bus);
|
|
|
|
|
log_hex("[pci] dev=", dev);
|
|
|
|
|
log_hex("[pci] func=", func);
|
|
|
|
|
log_hex("[pci] vendor=", vendor2);
|
|
|
|
|
log_hex("[pci] device=", device);
|
|
|
|
|
g_log->info("[pci] class");
|
|
|
|
|
g_log->info(pci_class_name(class_code, subclass));
|
|
|
|
|
log_hex("[pci] class_hex=", class_code);
|
|
|
|
|
log_hex("[pci] subclass=", subclass);
|
2026-07-31 13:53:49 +08:00
|
|
|
|
|
|
|
|
/* 网卡自动识别与驱动匹配提示 */
|
|
|
|
|
if (class_code == 0x02) {
|
|
|
|
|
const char *chip_name = netchip_name(vendor2, device);
|
|
|
|
|
u8 drv = netchip_driver(vendor2, device);
|
|
|
|
|
g_log->info("[pci] NetChip");
|
|
|
|
|
if (chip_name) {
|
|
|
|
|
g_log->info(chip_name);
|
|
|
|
|
} else {
|
|
|
|
|
g_log->info("unknown");
|
|
|
|
|
}
|
|
|
|
|
g_log->info("[pci] NetSub");
|
|
|
|
|
g_log->info(net_subclass_name(subclass));
|
|
|
|
|
switch (drv) {
|
|
|
|
|
case 0: g_log->info("[pci] -> driver: e1000"); break;
|
|
|
|
|
case 1: g_log->info("[pci] -> driver: e1000 (e1000e compat)"); break;
|
|
|
|
|
case 2: g_log->info("[pci] -> driver: r8169 (NOT YET IMPLEMENTED)"); break;
|
|
|
|
|
case 3: g_log->info("[pci] -> driver: igb (e1000 compat)"); break;
|
|
|
|
|
case 4: g_log->info("[pci] -> driver: ath9k"); break;
|
|
|
|
|
case 0xFF: g_log->info("[pci] -> driver: NONE (unsupported)"); break;
|
|
|
|
|
default: break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* PCI-PCI 桥检测: 递归扫描下游总线 */
|
|
|
|
|
if (class_code == 0x06 && (subclass == 0x04 || subclass == 0x09)) {
|
|
|
|
|
u8 sec_bus = (u8)pci_cfg_read(bus, dev, func, PCI_SEC_BUS);
|
|
|
|
|
if (sec_bus > bus && sec_bus < 255) {
|
|
|
|
|
g_log->info("[pci] bridge -> secondary bus");
|
|
|
|
|
log_hex("[pci] sec_bus=", sec_bus);
|
|
|
|
|
pci_scan_bus(sec_bus);
|
|
|
|
|
}
|
|
|
|
|
}
|
2026-07-02 15:40:39 +08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* ---------------------------------------------------------------
|
|
|
|
|
* Driver entry
|
|
|
|
|
* --------------------------------------------------------------- */
|
|
|
|
|
__attribute__((visibility("default")))
|
|
|
|
|
int driver_init(const struct dkm_kernel_api *api,
|
|
|
|
|
struct dkm_driver_handle *handle) {
|
|
|
|
|
(void)handle;
|
|
|
|
|
|
|
|
|
|
if (!api || !api->log) return -1;
|
|
|
|
|
g_log = api->log;
|
|
|
|
|
|
2026-07-31 13:53:49 +08:00
|
|
|
g_device_count = 0;
|
2026-07-02 15:40:39 +08:00
|
|
|
g_log->info("[pci] scanning PCI bus");
|
|
|
|
|
pci_scan_bus(0);
|
2026-07-31 13:53:49 +08:00
|
|
|
log_hex("[pci] total devices=", g_device_count);
|
2026-07-02 15:40:39 +08:00
|
|
|
g_log->info("[pci] driver ready");
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
__attribute__((visibility("default")))
|
|
|
|
|
int driver_exit(struct dkm_driver_handle *handle) {
|
|
|
|
|
(void)handle;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
